Building an experimental system of MMC multilevels converter using nlm modulation algorithm to improve activites based on FPGA

Abstract

    Modular Multilevel Converter (MMC) has many advantages over conventional multilevel converters in applying to high voltage systems. However, MMC requires a lot of
I/O ports when design experimental system. Therefore, the control experiment for the MMC will not be able to produce the desired number of I/O ports if using a DSP digital signal
processor with only 24 I/O signal ports. This paper presents experimental results of MMC using FPGA in applying NLM (Nearest Level Modulation) and capacitor voltage balancing
algorithm for MMC with 12 SM (Sub-module) to generate voltage 13 level ac output. Applying NLM method and capacitor voltage balancing algorithm has greatly reduced the
switching frequency and generated AC voltage output with very low harmonic distortion. In this case, the FPGA digital microprocessor device is the right choice to meet the number of MMC I/O ports with fast and flexible computing speed. The effectiveness of the proposed algorithm is proven by building simulations and experimenting with the BBD model at
laboratory scale.