IPD, POD and APOD Multi-carrier PWM Techniques for Five-Level Nested Neutral Point Clamped Inverter

Abstract

Recently, high-voltage and high-power devices in industrial applications and power grids in the form of Nested Neutral Point Clamped
(NNPC) multi-level inverters have been proposed and developed. Control methods for these converters have received significant research
attention to provide low output harmonic distortion and reduced Common Mode Voltage (CMV). Carrier-Based Pulse Width Modulation
(CBPWM) is a preferred choice due to its simplicity. This paper investigates and compares the characteristics of various Sine-triangle
CBPWM techniques applied to the five-level NNPC inverter, such as In-Phase-Disposition PWM (IPD-PWM), Phase-OppositionDisposition PWM (POD-PWM), and Alternative-Phase-Opposition-Disposition PWM (APOD-PWM). The balancing of DC capacitor voltages is realized by repetitive voltage states. Both simulated and experimental results reveal that the IPD-PWM method yields the lowest
harmonic distortion. The POD-PWM technique excels in limiting the Common Mode Voltage (CMV) magnitude. Meanwhile, APODPWM offers better harmonic waveform quality compared to POD-PWM but still exhibits higher CMV magnitude during high-voltage operation. The results also demonstrate that the capacitor voltage balancing algorithm is effective for all three techniques, including IPDPWM, POD-PWM, and APOD-PWM.